TL 061,62,64.pdf

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TL061, TL061A, TL061B, TL062, TL062A
TL062B, TL064, TL064A, TL064B
LOW POWER JFET INPUT OPERATIONAL AMPLIFIERS
SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004
D
Very Low Power Consumption
D
Typical Supply Current . . . 200
µA
D
D
D
(Per Amplifier)
Wide Common-Mode and Differential
Voltage Ranges
Low Input Bias and Offset Currents
Common-Mode Input Voltage Range
Includes V
CC+
D
D
D
D
D
Output Short-Circuit Protection
High Input Impedance . . . JFET-Input Stage
Internal Frequency Compensation
Latch-Up-Free Operation
High Slew Rate . . . 3.5 V/µs Typ
TL061, TL061A . . . D, P, OR PS PACKAGE
TL061B . . . P PACKAGE
(TOP VIEW)
TL062 . . . D, JG, P, PS, OR PW PACKAGE
TL062A . . . D, P, OR PS PACKAGE
TL062B . . . D OR P PACKAGE
(TOP VIEW)
OFFSET N1
IN−
IN+
V
CC−
1
2
3
4
8
7
6
5
NC
V
CC+
OUT
OFFSET N2
1OUT
1IN−
1IN+
V
CC−
1
2
3
4
8
7
6
5
V
CC+
2OUT
2IN−
2IN+
NC
1OUT
NC
VCC+
NC
1OUT
1IN−
1IN+
V
CC+
2IN+
2IN−
2OUT
1
2
3
4
5
6
7
14
13
12
11
10
9
8
4OUT
4IN−
4IN+
V
CC−
3IN+
3IN−
3OUT
NC
1IN−
NC
1IN+
NC
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
NC
2OUT
NC
2IN−
NC
1IN+
NC
V
CC+
NC
2IN+
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
1IN−
1OUT
NC
4OUT
4IN−
4IN+
NC
V
CC−
NC
3IN+
On products compliant to MIL PRF 38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
TL064 . . . D, J, N, NS, PW, OR W PACKAGE
TL064A, TL064B . . . D OR N PACKAGE
(TOP VIEW)
TL062 . . . FK PACKAGE
(TOP VIEW)
TL064 . . . FK PACKAGE
(TOP VIEW)
description/ordering information
The JFET-input operational amplifiers of the TL06_ series are designed as low-power versions of the
TL08_ series amplifiers. They feature high input impedance, wide bandwidth, high slew rate, and low input offset
and input bias currents. The TL06_ series features the same terminal assignments as the TL07_ and
TL08_ series. Each of these JFET-input operational amplifiers incorporates well-matched, high-voltage JFET
and bipolar transistors in an integrated circuit.
The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized
for operation from −40°C to 85°C, and the M-suffix devices are characterized for operation over the full military
temperature range of −55°C to 125°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright
2004, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
2IN−
2OUT
NC
3OUT
3IN−
NC
VCC−
NC
2IN+
NC
NC − No internal connection
1
SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004
TL061, TL061A, TL061B, TL062, TL062A
TL062B, TL064, TL064A, TL064B
LOW POWER JFET INPUT OPERATIONAL AMPLIFIERS
description/ordering information (continued)
ORDERING INFORMATION
TA
VIOMAX
AT 25°C
PDIP (P)
PDIP (N)
PACKAGE†
Tube of 50
Tube of 25
Tube of 75
Reel of 2500
Tube of 75
SOIC (D)
15 mV
Reel of 2500
Tube of 50
Reel of 2500
SOP (PS)
SOP (NS)
Reel of 2000
Reel of 2000
Tube of 150
TSSOP (PW)
Reel of 2000
Tube of 90
Reel of 2000
0°C to 70°C
PDIP (P)
PDIP (N)
Tube of 50
Tube of 25
Tube of 75
Reel of 2500
6 mV
Tube of 75
SOIC (D)
Reel of 2500
Tube of 50
Reel of 2500
SOP (PS)
PDIP (P)
PDIP (N)
3 mV
SOIC (D)
Reel of 2000
Tube of 50
Tube of 25
Tube of 75
Reel of 2500
Tube of 50
Reel of 2500
ORDERABLE
PART NUMBER
TL061CP
TL062CP
TL064CN
TL061CD
TL061CDR
TL062CD
TL062CDR
TL064CD
TL064CDR
TL061CPSR
TL062CPSR
TL064CNSR
TL062CPW
TL062CPWR
TL064CPW
TL064CPWR
TL061ACP
TL062ACP
TL064ACN
TL061ACD
TL061ACDR
TL062ACD
TL062ACDR
TL064ACD
TL064ACDR
TL061ACPSR
TL062ACPSR
TL061BCP
TL062BCP
TL064BCN
TL062BCD
TL062BCDR
TL064BCD
TL064BCDR
062BC
TL064BC
TL064AC
T061A
T062A
TL061BCP
TL062BCP
TL064BCN
062AC
061AC
T062
T064
TL061ACP
TL062ACP
TL064ACN
TL064C
T061
T062
TL064
TL062C
TL061C
TOP-SIDE
MARKING
TL061CP
TL062CP
TL064CN
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
2
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
TL061, TL061A, TL061B, TL062, TL062A
TL062B, TL064, TL064A, TL064B
LOW POWER JFET INPUT OPERATIONAL AMPLIFIERS
SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004
description/ordering information (continued)
ORDERING INFORMATION (continued)
TA
VIOMAX
AT 25°C
PDIP (P)
PDIP (N)
PACKAGE†
Tube of 50
Tube of 25
Tube of 75
Reel of 2000
−40°C to 85°C
6 mV
SOIC (D)
Tube of 75
Reel of 2000
Tube of 50
Reel of 2500
TSSOP (PW)
CDIP (JG)
6 mV
−55 C 125°C
−55°C to 125 C
9 mV
LCCC (FK)
CDIP (J)
CFP (W)
LCCC (FK)
Reel of 2000
Tube of 50
Tube of 55
Tube of 25
Tube of 150
Tube of 55
ORDERABLE
PART NUMBER
TL061IP
TL062IP
TL064IN
TL061ID
TL061IDR
TL062ID
TL062IDR
TL064ID
TL064IDR
TL062IPWR
TL062MJG
TL062MFK
TL064MJ
TL064MW
TL064MFK
TL064I
TL062I
TL062MJG
TL062MFK
TL064MJ
TL064MW
TL064MFK
TL062I
TL061I
TOP-SIDE
MARKING
TL061IP
TL062IP
TL064IN
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
3
SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004
TL061, TL061A, TL061B, TL062, TL062A
TL062B, TL064, TL064A, TL064B
LOW POWER JFET INPUT OPERATIONAL AMPLIFIERS
symbol (each amplifier)
IN+
IN−
+
−
OUT
OFFSET N1
OFFSET N2
Offset Null/Compensation
TL061 Only
schematic (each amplifier)
VCC+
IN+
IN−
50
Ω
100
Ω
C1
OFFSET N1
OFFSET N2
OUT
VCC−
TL061 Only
C1 = 10 pF on TL061, TL062, and TL064
Component values shown are nominal.
4
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
TL061, TL061A, TL061B, TL062, TL062A
TL062B, TL064, TL064A, TL064B
LOW POWER JFET INPUT OPERATIONAL AMPLIFIERS
SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
TL06_C
TL06_AC
TL06_BC
Supply voltage, VCC+ (see Note 1)
Supply voltage, VCC− (see Note 1)
Differential input voltage, VID (see Note 2)
Input voltage, VI (see Notes 1 and 3)
Duration of output short circuit (see Note 4)
D (8-pin) package
D (14-pin) package
N package
NS package
Package thermal impedance,
θ
JA (see Notes 5 and 6)
P package
PS package
PW (8-pin) package
PW (14-pin)
package
FK package
Package thermal impedance,
θ
JC (see Notes 7 and 8)
J package
JG package
W package
Operating virtual junction temperature, TJ
Case temperature for 60 seconds
Lead temperature 1,6 mm (1/16 inch) from case for 60
seconds
Lead temperature 1,6 mm (1/6 inch) from case for 10
seconds
Storage temperature range, Tstg
FK package
J, JG, U, or
W package
D, N, NS, P, PS,
or PW package
260
−65 to 150
260
−65 to 150
−65 to 150
150
150
18
−18
±30
±15
Unlimited
97
86
80
76
85
95
149
113
TL06_I
18
−18
±30
±15
Unlimited
97
86
80
76
85
95
149
113
5.61
15.05
14.5
14.65
150
260
300
°C
°C
°C
°C
°C
°C/W
°C/W
C/W
TL06_M
18
−18
±30
±15
Unlimited
UNIT
V
V
V
V
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values except differential voltages are with respect to the midpoint between VCC+ and VCC−.
2. Differential voltages are at IN+ with respect to IN−.
3. The magnitude of the input voltage should never exceed the magnitude of the supply voltage or 15 V, whichever is less.
4. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the
dissipation rating is not exceeded.
5. Maximum power dissipation is a function of TJ(max),
θ
JA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
6. The package thermal impedance is calculated in accordance with JESD 51-7.
7. Maximum power dissipation is a function of TJ(max),
θ
JC, and TC. The maximum allowable power dissipation at any allowable case
temperature is PD = (TJ(max) − TC)/θJC. Operating at the absolute maximum TJ of 150°C can affect reliability.
8. The package thermal impedance is calculated in accordance with MIL-STD-883.
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
5

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