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Logical Instructions
Logical instructions perform logical bitwise operations on operands.
AND
AND
BIC
BIC
EOR
EOR
ORR
ORR
AND<cond>{S} Rd, Rn, #imm
AND<cond>{S} Rd, Rn, Rm{, <shift>}
BIC<cond>{S} Rd, Rn, #imm
BIC<cond>{S} Rd, Rn, Rm{, <shift>}
EOR<cond>{S} Rd, Rn, #imm
EOR<cond>{S} Rd, Rn, Rm{, <shift>}
ORR<cond>{S} Rd, Rn, #imm
ORR<cond>{S} Rd, Rn, Rm{, <shift>}
AND immed
AND
Bit clear immed
Bit clear
Exclusive OR immed
Exclusive OR
Logical OR immed
Logical OR
Comparison Instructions
Rd = Rn
∧
imm
Rd = Rn
∧
Shift(Rm)
Rd = Rn
∧
¬imm
Rd = Rn
∧
¬Shift(Rm)
Rd = Rn
⊕
imm
Rd = Rn
⊕
Shift(Rm)
Rd = Rn
∨
imm
Rd = Rn
∨
Shift(Rm)
Comparison instructions compare two values and set appropriate status flags.
CMN
CMN
CMP
CMP
TEQ
TEQ
TST
TST
CMN<cond> Rn, #imm
CMN<cond> Rn, Rm{, <shift>}
CMP<cond> Rn, #imm
CMP<cond> Rn, Rm{, <shift>}
TEQ<cond> Rn, #imm
TEQ<cond> Rn, Rm{, <shift>}
TST<cond> Rn, #imm
TST<cond> Rn, Rm{, <shift>}
Compare negative immed
Compare negative
Compare immed
Compare
Test equality immed
Test equality
Test bits immed
Test bits
Branch Instructions
CPSR flags set on (Rn + imm)
CPSR flags set on (Rn + Shift(Rm))
CPSR flags set on (Rn − imm)
CPSR flags set on (Rn − Shift(Rm))
CPSR flags set on (Rn
⊕
imm)
CPSR flags set on (Rn
⊕
Shift(Rm))
CPSR flags set on (Rn
∧
imm)
CPSR flags set on (Rn
∧
Shift(Rm))
Branch instructions order instruction processing to start elsewhere conditionally or unconditionally.
B
BL
B<cond> imm
BL<cond> imm
Branch relative
Branch and link relative
Miscellaneous Instructions
Any instruction that doesn't belong anywhere else.
PC = PC + address
LR = RET
PC = PC + address
SWI
SWI<cond> imm
Software interrupt
LR = RET
Execute SWI vector in supervisor mode
ARMv1 ISA
Mnemonic
Syntax
Description
Movement Instructions
Movement instructions move data between registers and operands.
Action
MOV
MOV
MVN
MVN
MOV<cond>{S} Rd, #imm
MOV<cond>{S} Rd, Rm{, <shift>}
MVN<cond>{S} Rd, #imm
MVN<cond>{S} Rd, Rm{, <shift>}
Move value immed
Move value
Move NOT value immed
Move NOT value
Load Instructions
Rd = immed
Rd = Shift(Rm)
Rd = ¬immed
Rd = ¬Shift(Rm)
Load instructions move the content of memory addresses into registers.
LDM
LDM<cond><type> Rn{!}, <reglist>{^}
Load multiple
addr = Rn
for each Rd in {reglist}:
Rd = [addr]
update address based on {type}
Rd = [Rn + imm]
If !: Rn = Rn + imm
Rd = [Rn + Shift(Rm)]
If !: Rn = Rn + Shift(Rm)]
Rd = [Rn]
Rn = Rn + imm
Rd = [Rn]
Rn = Rn + Shift(Rm)
LDR
LDR
LDR
LDR
LDR<cond>{B} Rd, [Rn{, #imm}]{!}
LDR<cond>{B} Rd, [Rn, Rm{, <shift>}]{!}
LDR<cond>{B}{T} Rd, [Rn], #imm
Load register immed
Load register
Load register, post index
LDR<cond>{B}{T} Rd, [Rn], Rm{, <shift>} Load register, post index
Store Instructions
Store instructions moves the values from registers into memory.
STM
STM<cond><type> Rn{!}, <reglist>{^}
Store multiple
addr = Rn
for each Rd in {reglist}:
[addr] = Rd
update address based on {type}
[Rn + imm] = Rd
If !: Rn = Rn + imm
[Rn + Shift(Rm)] = Rd
If !: Rn = Rn + Shift(Rm)]
[Rn] = Rd
Rn = Rn + imm
[Rn] = Rd
Rn = Rn + Shift(Rm)
STR
STR
STR
STR
STR<cond>{B} Rd, [Rn{, #imm}]{!}
STR<cond>{B} Rd, [Rn, Rm{, <shift>}]{!}
STR<cond>{B}{T} Rd, [Rn], #imm
Store register immed
Store register
Store register, post index
STR<cond>{B}{T} Rd, [Rn], Rm{, <shift>} Store register, post index
Arithmetic Instructions
Arithmetic instructions perform basic mathematical operations on two operands.
ADC
ADC
ADD
ADD
RSB
RSB
RSC
RSC
ADC<cond>{S} Rd, Rn, #imm
ADC<cond>{S} Rd, Rn, Rm{, <shift>}
ADD<cond>{S} Rd, Rn, #imm
ADD<cond>{S} Rd, Rn, Rm{, <shift>}
RSB<cond>{S} Rd, Rn, #imm
RSB<cond>{S} Rd, Rn, Rm{, <shift>}
RSB<cond>{S} Rd, Rn, #imm
RSB<cond>{S} Rd, Rn, Rm{, <shift>}
Add and carry immed
Add and carry
Add immed
Add
Reverse subtract immed
Reverse subtract
Rd = Rn + imm + C
Rd = Rn + Shift(Rm) + C
Rd = Rn + imm
Rd = Rn + Shift(Rm)
Rd = imm − Rn
Rd = Shift(Rm) − Rn
Reverse subtract with carry immed Rd = imm − Rn − ¬C
Reverse subtract with carry
Rd = Shift(Rm) − Rn − ¬C
SBC
SBC
SUB
SUB
SBC<cond>{S} Rd, Rn, #imm
SBC<cond>{S} Rd, Rn, Rm{, <shift>}
SUB<cond>{S} Rd, Rn, #imm
SUB<cond>{S} Rd, Rn, Rm{, <shift>}
Subtract with carry immed
Subtract with carry
Subtract immed
Subtract
Rd = Rn − imm − ¬C
Rd = Rn − Shift(Rm) − ¬C
Rd = Rn − imm
Rd = Rn − Shift(Rm)
Plik z chomika:
Adi67
Inne pliki z tego folderu:
1.pdf
(176 KB)
2.pdf
(297 KB)
ARMv1_.html
(8 KB)
temp.pdf
(376 KB)
ARMv1.doc
(71 KB)
Inne foldery tego chomika:
ARMv2
ARMv3
ARMv5
ARMv7
ARMv8
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