1985_Peripheral_Processor_Interface_Guide.pdf

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Peripheral
Processor
Interface Guide
Technical Manual
sog-(p
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80~8(p
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Z80
CPU
Advanced Micro Devices
Peripheral Processor
Interface Guide
Technical Manual
The International Standard of
Quality guarantees a 0.05% AQL on
all
electrical parameters, AC and DC,
over the entire
ope~e.
©1985 Advanced Micro Devices, Inc.
The material in this document is subject to change without notice.
Advanced Micro Devices cannot accept responsibility for use of any circuitry
described other than circuitry embodied in an Advanced Micro Devices' product.
The applications software contained in this publication are for illustration
purposes only and Advanced Micro Devices makes no representation or
warranty that such programs will be suitable for the use specified
without further testing or modification.
Printed in U.S.A.
TABLE OF CONTENTS
Page
1.0
INTRODUCTION .................................................................... .
Intended Audience ................................................................ .
Goal Of This Book ................................................................ .
Why AMD Is Publishing- This Manual ................................................
Designer's Role In Intelligent Peripheral Environment..... ............. .. ....... .......
Organization Of This Book . . . . . . . . .. . . .. . . .. . . .. . . . . .. . . . . . . .. . . . . . . . . . .. . . . . . . . . . . .
How To Use This Book . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1-1
1-1
1-1
1-1
1-1
1-1
1-1
SECTION A: INTERFACING
2.0
2.1.0
2.2.0
2.3.0
THE INTERFACE PROBLEM ........................................................ .
Timings-Setup And Hold Times ................................................... .
Metastable Operation ............................................................. .
Bus Structures ................................................................... .
Multibus ....................................................................... .
iSBX Bus ...................................................................... .
RELATED DESIGN ISSUES .....................................'.................... .
OSCILLATOR CONSIDERATIONS ................................................... .
MOS Oscillators .................................................................. .
Overtone Crystal Oscillator ........................................................ .
TEMPERATURE CONSIDERATIONS ................................................. .
2-1
2-1
2-3
2-4
2-5
2-5
3-1
3-1
3-5
3-6
3-7
3.0
3.1
3.1.1
3.1.2
3.2
SECTION B: 16-BIT PROCESSORS
4.0
4.1
4.2
4.2.1
4.2.2
INTERFACING TO THE
8086/80186...................................................
8086 OVERVIEW ...................................................................
THE 8086 AND Z8000 PERIPHERALS ................................................
Z8000 Peripherals Without Interrupts ................................................
Z8000 Peripherals With Interrupts ...................................................
Discrete Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAL Implementation .............................................................
The 8086 And AmZ8530 Interface ................ . . . .. . . . . . . .. . . . . . .. . . .. .. . . . . . . .. .
THE 8086 AND AMD PROPRIETARY PERIPHERALS ..................................
The 8086 To Am7990 LANCE Interface ................................. _. . . .. . . . . . . .
The 80186 To Am7990 LANCE Interface .............................................
The 8086 To AmZ8052 CRTC Interface..............................................
The 80186 To AmZ8068 Data Ciphering Processor Interface ...........................
The 8086 And Am9513A System Timing Controller Interface ...........................
The 8086 To Am9516 Universal DMA Controller Interface. .............................
Am9516 in MIN. Mode ...........................................................
Discrete Design .................................................................
PAL Design ........................................................ _............
Am9516 in MAX. Mode ..........................................................
4-1
4-1
4-1
4-1
4-3
4-3
4-3
4-4
4-8
4-8
4-11
4-12
4-15
4-16
4-17
4-17
4-17
4-17
4-18
4.2.3
4.3
4.3.1
4.3.2
4.3.3
4.3.4
4.3.5
4.3.6
4.3.7
4.3.8
4.3.9
4.3.10
5.0
5.1
5.2
5.3
5.3.1
5.3.2
5.3.3
5.3.4
5.3.5
5.3.6
6.0
6.1
6.2
6.2.1
6.2.2
6.2.3
6.3
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
6.3.6
The
The
The
The
80186 To Am9516A Universal DMA Controller Interface ........................... .
8086/8088 To Am9518/AmZ8068/Am9568 Interface .............................. .
8086 And Am9519A Interrupt Controller Interface ................................ .
80286 To Am9568 Data Ciphering Processor Interface ............................ .
Page
4-21
4-22
4-32
4-33
5-1
5-1
5-1
5-1
5-1
5-10
5-19
5-19
5-23
5-23
6-1
6-1
6-1
6-1
6-2
6-2
6-5
6-7
6-7
6-9
6-12
6-17
6-18
6-21
6-21
6-21
6-23
INTERFACING TO THE 8088 ........................................................ .
OVERVIEW OF THE 8088 .......................................................... .
THE 8088 AND Z8000 PERIPHERALS ............................................... .
THE 8088 AND AMD PROPRIETARY PERIPHERALS ................................. .
The 8088 And AmZ8052 CRT Controller ............................................ .
The 8088 And AmZ8068 Data Ciphering Processor .................................. .
The 8088 And Am9513A System Timing Controller ................................... .
The 8088 And Am9516 Universal DMA Controller .................................... .
The 8088 And Am9517A Interface .................................................. .
The 8088 And Am9519A Interrupt Controller ......................................... .
INTERFACING TO THE 68000 ....................................................... .
OVERVIEW OF THE 68000 ......................................................... .
THE 68000 AND AMZ85XX PERIPHERALS .......................................... .
The 68000 And AmZ8530 Without Interrupts ......................................... .
The 68000 And AmZ8530 With Interrupts ........................................... .
SSI/MSI Implementation ......................................................... .
The 6800 And AmZ853 With Interrupts Via PAL Implementation ....................... .
68000 AND AMD PROPRIETARY PERIPHERALS ..................................... .
68000 And Am7990 LANCE Interface ............................................... .
68000 And AmZ8052 CRT Controller Interface ....................................... .
68000 And AmZ8068 Data Ciphering Processor Interface ............................. .
68000 And Am9513A System Timing Controller Interface ............................. .
68000 And A SINGLE Am9516 DMA Controller Interface .............................. .
68000 And Dual Am9516 DMA Controllers Interface .................................. .
Without Other Bus Masters ...................................................... .
With Other Bus Masters ......................................................... .
68000 And Am9519A Interrupt Controller Interface ................................... .
6.3.7
SECTION C: 8-BIT PROCESSORS
7.0
7.1
7.1.1
7.1.2
7.1.3
7.1.4
7.1.5
7.1.6
7.1.7
INTERFACING TO THE Z80 ....................... . . . . .. .. . . . . . .. .. . . . . . . . . . . . . . . . .. .
OVERVIEW OF THE Z80 ............................................................
The Z80 And Am9511A Arithemetic Processor........................................
The Z80 And Am9512 Arithemetic Processor.........................................
The Z80 And Am9513A System Timing Controller.....................................
The Z80 And Am9517A DMA Controller..............................................
The Z80 And Am9568 Data Ciphering Processor With The Am9517 DMA Controller ......
The Z80 And Am9518/AmZ8068 Data Ciphering Processor ............................
The Z80 And Am9519A Interrupt Controller...........................................
7-1
7-1
7-1
7-2
7-3
7-6
7-9
7-15
7-23

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