MC34119.pdf

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Jameco Part Number 316865
Order this document by MC34119/D
Low Power Audio Amplifier
The MC34119 is a low power audio amplifier intergrated circuit intended
(primarily) for telephone applications, such as in speakerphones. It provides
differential speaker outputs to maximize output swing at low supply voltages
(2.0 V minimum). Coupling capacitors to the speaker are not required. Open
loop gain is 80 dB, and the closed loop gain is set with two external resistors.
A Chip Disable pin permits powering down and/or muting the input signal.
The MC34119 is available in standard 8–pin DIP, SOIC package, and
TSSOP package.
Wide Operating Supply Voltage Range (2.0 V to 16 V), Allows
Telephone
Line Powered Applications
Low Quiescent Supply Current (2.7 mA Typ) for Battery
Powered Applications
Chip Disable Input to Power Down the IC
MC34119
LOW POWER
AUDIO AMPLIFIER
SEMICONDUCTOR
TECHNICAL DATA
8
1
Low Power–Down Quiescent Current (65
µA
Typ)
Drives a Wide Range of Speaker Loads (8.0
and Up)
Output Power Exceeds 250 mW with 32
Speaker
Low Total Harmonic Distortion (0.5% Typ)
Gain Adjustable from <0 dB to >46 dB for Voice Band
Requires Few External Components
8
P SUFFIX
PLASTIC PACKAGE
CASE 626
1
MAXIMUM RATINGS
Rating
Supply Voltage
Maximum Output Current at VO1, VO2
Maximum Voltage @ Vin, FC1, FC2, CD
Applied Output Voltage to VO1, VO2 when disabled
Junction Temperature
NOTE:
ESD data available upon request.
Value
–1.0 to +18
±250
–1.0, VCC + 1.0
–1.0, VCC + 1.0
–55, +140
Unit
Vdc
mA
Vdc
°C
D SUFFIX
PLASTIC PACKAGE
CASE 751
(SO–8)
8
1
DTB SUFFIX
PLASTIC PACKAGE
CASE 948J
(TSSOP)
Block Diagram and Simplified Application
Rf
75 k
6
Ci
0.1
Ri
3.0 k
VCC
PIN CONNECTIONS
CD 1
FC2 2
FC1 3
8 VO2
7 Gnd
6 VCC
5 VO1
(Top View)
Audio
Input
Vin
FC1
4
3
+
#1
4.0 k
4.0 k
5
VO1
Speaker
Vin 4
C1
1.0
µF
C2*
5.0
µF
FC2
2
50 k
125 k
50 k
+
#2
Bias
Circuit
8
VO2
ORDERING INFORMATION
1
CD
Chip
Disable
Device
MC34119P
Operating
Temperature Range
Package
Plastic DIP
MC34119
7
* = Optional
Differential Gian = 2 x
Gnd
Rf
Ri
MC34119D
MC34119DTB
TA = –20° to +70°C
SO–8
TSSOP
Rev 1
This device contains 45 active transistors.
©
Motorola, Inc. 1996
MOTOROLA ANALOG IC DEVICE DATA
1
MC34119
RECOMMENDED OPERATING CONDITIONS
Characteristics
Supply Voltage
Voltage @ CD (Pin 1)
Load Impedance
Peak Load Current
Differential Gain (5.0 kHz Bandwidth)
Ambient Temperature
Symbol
VCC
VCD
RL
IL
AVD
TA
Min
+2.0
0
8.0
0
–20
Max
+16
VCC
±200
46
+70
Unit
Vdc
Vdc
mA
dB
°C
ELECTRICAL CHARACTERISTICS
(TA = 25°C, unless otherwise noted.)
Characteristics
AMPLIFIERS (AC CHARACTERISTICS)
AC Input Resistance (@ VIn)
Open Loop Gain (Amplifier #1, f < 100 Hz)
Closed Loop Gain (Amplifier #2, VCC = 6.0 V, f = 1.0 kHz, RL = 32
Ω)
Gain Bandwidth Product
Output Power;
VCC = 3.0 V, RL = 16
Ω,
THD
10%
VCC = 6.0 V, RL = 32
Ω,
THD
10%
VCC = 12 V, RL = 100
Ω,
THD
10%
Total Harmonic Distortion (f = 1.0 kHz)
(VCC = 6.0 V, RL = 32
Ω,
Pout = 125 mW)
(VCC
3.0 V, RL = 8.0
Ω,
Pout = 20 mW)
(VCC
12 V, RL = 32
Ω,
Pout = 200 mW)
Power Supply Rejection (VCC = 6.0 V,
∆V
CC = 3.0 V)
(C1 =
∞,
C2 = 0.01
µF)
(C1 = 0.1
µF,
C2 = 0, f = 1.0 kHz)
(C1 = 1.0
µF,
C2 = 5.0
µF,
f = 1.0 kHz)
Differential Muting (VCC = 6.0 V, 1.0 kHz
f
20 kHz, CD = 2.0 V)
AMPLIFIERS (DC CHARACTERISTICS)
Output DC Level @ VO1, VO2, VCC = 3.0 V, RL = 16 (Rf = 75 k)
VCC = 6.0 V
VCC = 12 V
Output Level
High (Iout = –75 mA, 2.0 V
VCC
16 V)
Low (Iout = 75 mA, 2.0 V
VCC
16 V)
Output DC Offset Voltage (VO1–VO2)
(VCC = 6.0 V, Rf = 75 kΩ, RL = 32
Ω)
Input Bias Current @ Vin (VCC = 6.0 V)
Equivalent Resistance
@ FC1 (VCC = 6.0 V)
@ FC2 (VCC = 6.0 V)
CHIP DISABLE
(Pin 1)
Input Voltage
Low
High
Input Resistance (VCC = VCD = 16 V)
POWER SUPPLY
Power Supply Current
(VCC = 3.0 V, RL =
∞,
CD = 0.8 V)
(VCC= 16 V, RL =
∞,
CD = 0.8 V)
(VCC = 3.0 V, RL =
∞,
CD = 2.0 V)
NOTE:
Currents into a pin are positive, currents out of a pin are negative.
Symbol
Min
Typ
Max
Unit
ri
AVOL1
AV2
GBW
POut3
POut6
POut12
THD
80
–0.35
55
250
400
>30
0
1.5
0.5
0.5
0.6
12
52
>70
+0.35
MΩ
dB
dB
MHz
mW
%
1.0
dB
50
dB
PSRR
GMT
VO(3)
VO(6)
VO(12)
VOH
VOL
∆V
O
1.0
–30
1.15
2.65
5.65
VCC – 1.0
0.16
0
–100
150
25
1.25
Vdc
Vdc
mV
+30
–200
220
40
nA
kΩ
100
18
IIB
RFC1
RFC2
Vdc
VIL
VIH
RCD
2.0
50
90
0.8
175
kΩ
ICC3
ICC16
ICCD
2.7
3.3
65
4.0
5.0
100
mA
mA
µA
2
MOTOROLA ANALOG IC DEVICE DATA
MC34119
PIN FUNCTION DESCRIPTION
Symbol
CD
FC2
FC1
Pin
1
2
3
Description
Chip Disable – Digital input. A Logic “0” (<0.8 V) sets normal operation. A logic “1” (≥2.0 V) sets the power down
mode. Input impedance is nominally 90 kΩ .
A capacitor at this pin increases power supply rejection, and affects turn–on time. This pin can be left open if the
capacitor at FC1 is sufficient.
Analog ground for the amplifiers. A 1.0
µF
capacitor at this pin (with a 5.0
µF
capacitor at Pin 2) provides
(typically) 52 dB of power supply rejection. Turn–on time of the circuit is affected by the capacitor on this pin. This
pin can be used as an alternate input.
Amplifier input. The input capacitor and resistor set low frequency rolloff and input impedance. The feedback
resistor is connected to this pin and VO1.
Amplifier Output #1. The dc level is
(VCC – 0.7 V)/2.
DC supply voltage (+2.0 V to +16 V) is applied to this pin.
Ground pin for the entire circuit.
Amplifier Output #2. This signal is equal in amplitude, but 180° out–of–phase with that at VO1.
The dc level is
(VCC – 0.7 V)/2.
Vin
VO1
VCC
GND
VO2
4
5
6
7
8
TYPICAL TEMPERATURE PERFORMANCE
(–20° C < TA < +70°C)
Function
Input Bias Current (@ Vin)
Total Harmonic Distortion
(VCC = 6.0 V, RL = 32
Ω.
Pout = 125 mW, f = 1.0 kHz)
Power Supply Current
(VCC = 3.0 V, RL =
∞,
CD = 0 V)
(VCC = 3.0 V, RL =
∞,
CD = 2.0 V)
Typical Change
±40
+0.003
Units
pA/°C
%/°C
µA/°C
–2.5
–0.03
MOTOROLA ANALOG IC DEVICE DATA
3
MC34119
DESIGN GUIDELINES
General
The MC34119 is a low power audio amplifier capable of
low voltage operation (VCC = 2.0 V minimum) such as that
encountered in line–powered speakerphones. The circuit
provides a differential output (VO1–VO2) to the speaker to
maximize the available voltage swing at low voltages. The
differential gain is set by two external resistors. Pins FC1 and
FC2 allow controlling the amount of power supply and noise
rejection, as well as providing alternate inputs to the
amplifiers. The CD pin permits powering down the IC for
muting purposes and to conserve power.
Amplifiers
Referring to the block diagram, the internal configuration
consists of two identical operational amplifiers. Amplifier #1
has an open loop gain of
≥80
dB (at f
100 Hz), and the
closed loop gain is set by external resistor Rf and Ri. The
amplifier is unity gain stable, and has a unity gain frequency
of approximately 1.5 MHz. In order to adequately cover the
telephone voice band (300 Hz to 3400 Hz), a maximum
closed loop gain of 46 is recommended. Amplifier #2 is
internally set to a gain of – 1.0 (0 dB).
The outputs of both amplifiers are capable of sourcing and
sinking a peak current of 200 mA. The outputs can typically
swing to within
≈0.4
V above ground, and to within
≈1.3
V
below VCC, at the maximum current. See Figures 18 and 19
for VOH and VOL curves.
The output dc offset voltage (VO1–VO2) is primarily a
function of the feedback resistor (Rf), and secondarily due to
the amplifiers’ input offset voltages. The input offset voltage
of the two amplifiers will generally be similar for a particular
IC, and therefore nearly cancel each other at the outputs.
Amplifier #1’s bias current, however, flows out of Vin (Pin 4)
and through Rf, forcing VO1 to shift negative by an amount
equal to [Rf
×
IIB]. VO2 is shifted positive an equal amount.
The output offset voltage, specified in the Electrical
Characteristics, is measured with the feedback resistor
shown in the Typical Application Circuit, and therefore takes
into account the bias current as well as internal offset
voltages of the amplifiers. The bias current is constant with
respect to VCC.
FC1 and FC2
Power supply rejection is provided by the capacitors (C1
and C2 in the Typical Application Circuit) at FC1 and FC2. C2
is somewhat dominant at low frequencies, while C1 is
dominant at high frequencies, as shown in the graphs of
Figures 4 to 7. The required values of C1 and C2 depend on
the conditions of each application. A line powered
speakerphone, for example, will require more filtering than a
circuit powered by a well regulated power supply. The
amount of rejection is a function of the capacitors, and the
equivalent impedance looking into FC1 and FC2 (listed in the
Electrical Characteristics as RFC1 and RFC2).
In addition to providing filtering, C1 and C2 also affect the
turn–on time of the circuit at power–up, since the two
capacitors must charge up through the internal 50 k and
125 kΩ resistors. The graph of Figure 1 indicates the
turn–on time upon application of VCC of +6.0 V. The turn–on
time is
≈60%
longer for VCC = 3.0 V, and
≈20%
less for
VCC = 9.0 V. Turn–off time is <10
µs
upon removal of VCC.
Figure 1. Turn–On Time versus C1, C2 at Power–On
360
300
t, TURN–ON TIME (ms)
240
180
120
60
0
0
2.0
4.0
6.0
C1 = 1.0
µF
VCC switching from
0 V to 6.0 V
8.0
10
C2, CAPACITANCE (µF)
C1 = 5.0
µF
Chip Disable
The Chip Disable (Pin 1) can be used to power down the
IC to conserve power, or for muting, or both. When at a Logic
“0” (0 V to 0.8 V), the MC34119 is enabled for normal
operation. When Pin 1 is at a Logic “1” (2.0 V to VCC V), the
IC is disabled. If Pin 1 is open, that is equivalent to a Logic
“0,” although good design practice dictates that an input
should never be left open. Input impedance at Pin 1 is a
nominal 90 kΩ. The power supply current (when disabled) is
shown in Figure 15.
Muting, defined as the change in differential gain from
normal operation to muted operation, is in excess of 70 dB.
The turn–off time of the audio output, from the application of
the CD signal, is <2.0
µs,
and turn on–time is 12 ms–15 ms.
Both times are independent of C1, C2, and VCC.
When the MC34119 is disabled, the voltages at FC1 and
FC2 do not change as they are powered from VCC. The
outputs, VO1 and VO2, change to a high impedance condition,
removing the signal from the speaker. If signals from other
sources are to be applied to the outputs (while disabled), they
must be within the range of VCC and Ground.
Power Dissipation
Figures 8 to 10 indicate the device dissipation (within the
IC) for various combinations of VCC, RL, and load power. The
maximum power which can safely be dissipated within the
MC34119 is found from the following equation:
PD = (140°C – TA)/θJA
where TA is the ambient temperature; and
θ
JA is the package
thermal resistance (100°C/W for the standard DIP package,
and 180°C/W for the surface mount package.)
The power dissipated within the MC34119, in a given
application, is found from the following equation:
PD = (VCC x ICC) + (IRMS x VCC) – (RL x IRMS2)
where ICC is obtained from Figure 15; and IRMS is the RMS
current at the load; and RL is the load resistance.
Figures 8 to 10, along with Figures 11 to 13 (distortion
curves), and a peak working load current of
±200
mA, define
the operating range for the MC34119. The operating range is
further defined in terms of allowable load power in Figure 14
for loads of 8.0
Ω,
16
and 32
Ω.
The left (ascending) portion
4
MOTOROLA ANALOG IC DEVICE DATA
MC34119
of each of the three curves is defined by the power level at
which 10% distortion occurs. The center flat portion of each
curve is defined by the maximum output current capability of
the MC34119. The right (descending) portion of each curve is
defined by the maximum internal power dissipation of the IC
at 25°C. At higher ambient temperatures, the maximum load
power must be reduced according to the above equations.
Operating the device beyond the current and junction
temperature limits will degrade long term reliability.
Layout Considerations
Normally a snubber is not needed at the output of the
MC34119, unlike many other audio amplifiers. However, the
PC board layout, stray capacitances, and the manner in
which the speaker wires are configured, may dictate
otherwise. Generally, the speaker wires should be twisted
tightly, and not more than a few inches in length.
Figure 2. Amplifier #1 Open Loop Gain and Phase
100
80
60
40
20
0
Gain
Phase
0
72
108
AVOL (dB)
144
180
φ
, EXCESS PHASE (DEGREES)
36
36
Figure 3. Differential Gain versus Frequency
Rf = 150 k, Ri = 6.0 k
DIFFERENTIAL GAIN (dB)
32
24
16
8
0
100
Rf = 75 k, Ri = 3.0 k
0.1
Input
Ri
Rf
#1
+
#2
VO1
VO2
VO
100
1.0 k
10 k
f, FREQUENCY (Hz)
100 k
1.0 M
1.0 k
10 k
f, FREQUENCY (Hz)
20 k
MOTOROLA ANALOG IC DEVICE DATA
5
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