OP279.PDF

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FEATURES
Rail-to-Rail Inputs and Outputs
High Output Current:
±80
mA
Single Supply: +5 V to +12 V
Wide Bandwidth: 5 MHz
High Slew Rate: 3 V/µs
Low Distortion: 0.01%
Unity-Gain Stable
No Phase Reversal
Short Circuit Protected
Drives Capacitive Loads: 10 nF
APPLICATIONS
Multimedia
Telecom
DAA Transformer Driver
LCD Driver
Low Voltage Servo Control
Rail-to-Rail High Output
Current Operational Amplifier
OP279
FUNCTIONAL BLOCK DIAGRAM
8-Lead Narrow Body
8-Lead Epoxy DIP
SO (SO-8)
(N-8)
1
2
3
4
8
OP279
OUT A
–IN A
+IN A
–V
1
2
3
4
7
6
5
OP279
8
7
6
5
+V
OUT B
–IN B
+IN B
8-Lead
TSSOP
(RU Suffix)
1
4
8
5
PIN ROTATION IS THE SAME
FOR ALL PACKAGES.
OP279
GENERAL DESCRIPTION
The OP279 is a dual rail-to-rail, high output current, single-
supply amplifier. It is designed for low voltage applications that
require either current or capacitive load drive capability. The
OP279 can sink and source currents of
±
80 mA (typ) and is
stable with capacitive loads to 10 nF.
Applications that benefit from the OP279’s high output current
include driving headphones, displays, transformers, and power
transistors. The powerful output is combined with a unique
input stage that maintains very low distortion with wide common-
mode range, even in single supply designs.
The OP279 can be used as a buffer to provide much greater
drive capability than can usually be provided by CMOS outputs.
CMOS ASICs and DACs often have outputs that can swing to
both the positive supply and ground, but are incapable of driv-
ing greater than a few milliamps.
Bandwidth is typically 5 MHz and the slew rate is 3 V/µs,
making these amplifiers well suited for single supply applications
that require audio bandwidths when used in high gain configu-
rations. Operation is guaranteed from voltages as low as 4.5 V,
up to 12 V.
When using the OP279 in +5 volt systems, very good audio
performance can be attained. THD is below 0.01% with a
600
Ω
load, and noise is a respectable 21 nV/√Hz. Supply cur-
rent is less than 3.5 mA per amplifier.
The OP279 is available in 8-pin plastic DIP and SO-8 surface
mount packages. They are specified over the industrial (–40°C
to +85°C) temperature range.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
OP279–SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
(@ V = +5.0 V, V
S
CM
= 2.5 V, –40°C
≤
T
A
≤
+85°C unless otherwise noted)
Min
Typ
Max
4
±
300
±
600
±
50
±
100
5
66
4
Units
mV
nA
nA
nA
nA
V
dB
dB
V/mV
µV/°C
V
mV
mV
mA
Ω
dB
mA
V
V/µs
MHz
Degrees
nF
%
nV/√Hz
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Input Bias Current
Input Bias Current
Input Offset Current
Input Offset Current
Input Voltage Range
Common-Mode Rejection Ratio
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Offset Voltage Drift
OUTPUT CHARACTERISTICS
Output Voltage High
Output Voltage Low
Output Voltage Low
Short Circuit Limit
Output Impedance
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current/Amplifier
Supply Voltage Range
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Phase Margin
Capacitive Load Drive
AUDIO PERFORMANCE
Total Harmonic Distortion
Voltage Noise Density
Symbol
V
OS
I
B
I
B
I
OS
I
OS
V
CM
CMRR
CMRR
A
VO
∆V
OS
/∆T
V
OH
V
OL
V
OL
I
SC
Z
OUT
PSRR
I
SY
V
S
SR
GBP
φm
Conditions
V
OUT
= 2.5 V
V
OUT
= 2.5 V, T
A
= +25°C
V
OUT
= 2.5 V
V
OUT
= 2.5 V, T
A
= +25°C
V
OUT
= 2.5 V
V
CM
= 0 V to 5 V
V
CM
= 0 V to 3.5 V
R
L
= 1 kΩ, 0.3 V
≤
V
OUT
≤
4.7 V
0
56
70
20
I
L
= 10 mA Source
I
L
= 10 mA Sink, T
A
= +25°C
I
L
= 10 mA Sink
f = 1 MHz, A
V
= 1
V
S
= +4.5 V to +12 V
V
OUT
= 2.5 V
+4.8
±
45
±
80
22
88
2.6
75
100
76
+4.5
3.5
+12
R
L
= 1 kΩ, 1 nF
No Oscillation
3
5
60
10
0.01
22
A
THD
e
n
S
f = 1 kHz
ELECTRICAL SPECIFICATIONS
(@ V =
±5.0
V, –40°C
≤
T
≤
+85°C unless otherwise noted)
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Input Bias Current
Input Bias Current
Input Offset Current
Input Offset Current
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Large Signal Voltage Gain
Offset Voltage Drift
OUTPUT CHARACTERISTICS
Output Voltage High
Output Voltage Low
Short Circuit Limit
Open-Loop Output Impedance
POWER SUPPLY
Supply Current/Amplifier
DYNAMIC PERFORMANCE
Slew Rate
Full-Power Bandwidth
Gain Bandwidth Product
Phase Margin
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
Specifications subject to change without notice.
Symbol
V
OS
I
B
I
B
I
OS
I
OS
V
CM
CMRR
A
VO
A
VO
∆V
OS
/∆T
V
OH
V
OL
I
SC
Z
OUT
I
SY
SR
BW
p
GBP
φm
e
n
p-p
e
n
i
n
Conditions
Min
Typ
Max
4
±
300
±
600
±
50
±
100
+5
Units
mV
nA
nA
nA
nA
V
dB
V/mV
V/mV
µV/°C
V
V
mA
Ω
mA
V/µs
kHz
MHz
Degrees
µV
p-p
nV/√Hz
pA/√Hz
T
A
= +25°C
T
A
= +25°C
V
CM
= –5 V to +5 V
R
L
= 1 kΩ, –4.7 V
≤
V
OUT
≤
4.7 V,
T
A
= +25°C
R
L
= 1 kΩ, –4.7 V
≤
V
OUT
≤
4.7 V
–5
60
20
20
3
I
L
= 10 mA Source
I
L
= 10 mA Sink
f = 1 MHz, A
V
= +1
V
S
=
±
6 V, V
OUT
= 0 V
R
L
= 1 kΩ, 1 nF
1% Distortion
+4.8
±
50
±
80
22
2
3
5
69
0.1 Hz to 10 Hz
f = 1 kHz
2
22
66
–4.85
3.75
1
–2–
REV. B
OP279
WAFER TEST LIMITS
(@ V = +5.0 V, V
S
CM
= 2.5 V, T
A
= +25°C unless otherwise noted)
Conditions
V
OUT
= 2.5 V
V
OUT
= 2.5 V
V
OUT
= 2.5 V
V
CM
= 0 V to 5 V
V = +4.5 V to +12 V
R
L
= 1 kΩ
I
L
= 10 mA Source
I
L
= 10 mA Sink
V
S
=
±
6 V, V
OUT
= 0 V, R
L
=
∞
Limit
4
±
300
±
50
56
76
20
4.8
75
3.75
Units
mV max
nA max
nA max
dB min
dB min
V/mV min
V min
mV max
mA max
Parameter
Offset Voltage
Input Bias Current
Input Offset Current
Common-Mode Rejection
Power Supply Rejection Ratio
Large Signal Voltage Gain
Output Voltage High
Output Voltage Low
Supply Current/Amplifier
Symbol
V
OS
I
B
I
OS
CMRR
PSRR
A
VO
V
OH
V
OL
I
SY
NOTE
Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard
product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
ABSOLUTE MAXIMUM RATINGS
DICE CHARACTERISTICS
+V
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+16 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+16 V
Differential Input Voltage
1
. . . . . . . . . . . . . . . . . . . . . . . .
±
1 V
Output Short-Circuit Duration to GND . . . . . . . . . . Indefinite
Storage Temperature Range
P, S, RU Package . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range
OP279G, H . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Junction Temperature Range
P, S, RU Package . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . +300°C
Package Type
8-Pin Plastic DIP (P)
8-Pin SOIC (S)
8-Lead TSSOP
θ
JA2
103
158
240
θ
JC
43
43
43
Units
°C/W
°C/W
°C/W
OUTA
OUTB
–INA
–INB
+INA
+INB
–V
OP279 Die Size 0.070
×
0.070 inch, 4,900 sq. mils
Substrate (Die Backside) Is Connected to V+.
Transistor Count, 129
NOTES
1
The inputs are clamped with back-to-back diodes. If the differential input voltage
exceeds 1 volt, the input current should be limited to 5 mA.
2
θ
JA
is specified for the worst case conditions, i.e.,
θ
JA
is specified for device in socket
for P-DIP, packages;
θ
JA
is specified for device soldered in circuit board for SOIC
packages.
ORDERING GUIDE
Model
Temperature
Range
Package
Description
Package
Option
OP279GP
–40°C to +85°C
OP279GS
–40°C to +85°C
OP279HRU –40°C to +85°C
8-Pin Plastic DIP N-8
8-Pin SOIC
SO-8
8-Pin TSSOP
RU-8
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the OP279 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. B
–3–
OP279
Typical Performance Graphs
SHORT CIRCUIT CURRENT – mA
80
–I
SC
70
+I
SC
60
INPUT BIAS CURRENT – nA
V
S
= +5V
T = +25°C
140
A
620 x OP AMPS,
PDIP
120
100
160
90
400
V
S
= +5V
300
–40°C
200
100
0
–100
–200
–300
–400
+25°C
+85°C
UNITS
80
60
40
20
0
–2.5
50
V
S
= +5V
V
CM
= +2.5V
–1.5
–0.5
0.5
1.5
INPUT OFFSET – mV
2.5
40
–50
–25
0
25
50
TEMPERATURE –
°C
75
100
0
2
3
4
1
COMMON-MODE VOLTAGE – Volts
5
Figure 1. Input Offset Distribution
Figure 2. Short Circuit Current vs.
Temperature
Figure 3. Input Bias Current
vs. Common-Mode Voltage
3.0
2.5
OFFSET VOLTAGE – mV
100
SHORT CIRCUIT CURRENT – mA
7
V
S
= +5V
T
A
= +25°C
–I
SC
90
BANDWIDTH – MHz
6
5
4
3
2
1
0
V
S
= +5V
T
A
= +25°C
2.0
80
+I
SC
70
1.5
1.0
0.5
60
V
S
=
±5V
50
–50
–25
0
25
50
TEMPERATURE –
°C
75
100
0
0
1
2
3
4
5
COMMON-MODE VOLTAGE – Volts
0
2
3
4
1
COMMON-MODE VOLTAGE – Volts
5
Figure 4. Offset Voltage vs.
Common-Mode Voltage
Figure 5. Short Circuit Current vs.
Temperature
120
100
4
OPEN-LOOP GAIN – dB
Figure 6. Bandwidth vs.
Common-Mode Voltage
270
V
S
≥ ±2.5V
T
A
≥
–40°C
R
L
= 2kΩ
GAIN
60
40
PHASE
20
0
45
0
–45
–90
10M
135
90
225
180
PHASE – Degrees
1000
R
L
= 2k
OPEN-LOOP GAIN –V/mV
5
800
+EDGE
600
V
S
= +5V
0.3V
≤
V
OUT
≤
4.7V
80
SLEW RATE – V/µs
3
–EDGE
2
V
S
= +5V
R
L
= 1kΩ
C
L
= +1nF
400
R
L
= 1k
200
1
–20
–40
100
0
–50
–25
0
25
50
TEMPERATURE –
°C
75
100
0
–50
–25
0
25
50
TEMPERATURE –
°C
75
100
1k
10k
100k
FREQUENCY – Hz
1M
Figure 7. Open-Loop Gain vs.
Temperature
Figure 8. Slew Rate vs.
Temperature
Figure 9. Open-Loop Gain and
Phase vs. Frequency
–4–
REV.B
OP279
6.5
5
+EDGE
120
100
OPEN-LOOP GAIN – dB
270
V
S
≥ ±2.5V
T
A
≥
–40°C
R
L
= 2kΩ
C
L
= 500pF
225
180
135
90
PHASE
45
0
–45
–90
10M
PHASE – Degrees
SUPPLY CURRENT – mA
6.0
SLEW RATE – V/µs
V
S
=
±6V
4
80
60
40
20
0
–EDGE
3
GAIN
5.5
V
S
=
±5V
5.0
V
S
= +5V
V
CM
= +2.5V
2
V
S
=
±5V
R
L
= 1kΩ
C
L
= +1nF
4.5
1
–20
–40
100
4.0
–50
–25
0
25
50
TEMPERATURE –
°C
75
100
0
–50
–25
0
25
50
75
100
1k
TEMPERATURE –
°C
10k
100k
FREQUENCY – Hz
1M
Figure 10. Supply Current vs.
Temperature
120
POWER SUPPLY REJECTION – dB
Figure 11. Slew Rate vs. Temperature
Figure 12. Open-Loop Gain and
Phase vs. Frequency
180
6
100
MAXIMUM OUTPUT SWING – Volts
V
S
≥ ±2.5V
T
A
= +25°C
5
T
A
=+25°C
V
S
=
±2.5V
A
VCL
= +1
R
L
≥
1kΩ
160
140
T
A
= +25°C
V
S
=
±2.5V
OR
±5V
80
–PSRR
4
IMPEDANCE –
Ω
120
A
VCL
= 10 OR 100
100
80
60
40
60
+PSRR
40
3
2
20
0
10
100
1k
10k
100k
FREQUENCY – Hz
1M
10M
1
20
0
1k
10k
100k
1M
FREQUENCY – Hz
10M
0
10
A
VCL
= 1
100
1k
10k 100k
FREQUENCY – Hz
1M
10M
Figure 13. Power Supply Rejection vs.
Frequency
Figure 14. Maximum Output
Swing vs. Frequency
50
Figure 15. Closed-Loop Output
Impedance vs. Frequency
80
12
MAXIMUM OUTPUT SWING – Volts
T
A
=+25°C
V
S
=
±5V
A
VCL
= +1
R
L
≥
1kΩ
A
VCL
= +100
40
10
CLOSED-LOOP GAIN – dB
V
S
≥ ±2.5V
T
A
= +25°C
R
L
≥
1kΩ
70
60
OVERSHOOT – %
30
A
VCL
= +10
20
10
A
VCL
= +1
0
–10
–20
8
T
A
= +25°C
A
VCL
= +1
R
L
≥
1kΩ
V
S
≥ ±2.5V
V
IN
= +100mV p-p
50
40
30
POS EDGE & NEG EDGE
20
10
0
6
4
2
0
1k
10k
100k
1M
FREQUENCY – Hz
10M
–30
1k
10k
100k
1M
10M
FREQUENCY – Hz
100M
0
2k
4k
6k
8k
10k
LOAD CAPACITANCE – pF
Figure 16. Maximum Output Swing
vs. Frequency
Figure 17. Closed-Loop Gain vs.
Frequency
Figure 18. Small Signal Overshoot
vs. Load Capacitance
REV. B
–5–

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